Heterogeneous Photonic Integration

Photonic interconnects for the exascale AI era.

AiTexel develops next-generation photonic devices that break the bandwidth, energy, and reach limits of electrical interconnects — purpose-built for the AI data centers being designed today, and the exascale systems of 2030.

The interconnect wall is the AI scaling wall.

Every leap in AI compute density now runs into the same physics: electrical interconnects cannot move data fast enough, far enough, or efficiently enough to keep accelerators fed. Pluggable optics solved the last decade. The next decade requires light delivered directly to the package.

01 / Bandwidth

I/O scales slower than compute.

Aggregate accelerator bandwidth must scale faster than transistor density to feed modern AI workloads. Copper has run out of headroom at the package edge.

02 / Energy

Interconnect dominates the power budget.

Data movement — not compute — is the largest energy line item in a modern AI cluster. The trajectory is unsustainable at exascale without a step-change in pJ-per-bit.

03 / Reach

Rack-scale AI needs light at the die.

Training and inference clusters are now physically larger than a copper-electrical signal can credibly span at speed. Optics has to move from the faceplate to the substrate.

Heterogeneous photonic integration, designed for manufacturing.

AiTexel's platform integrates dissimilar photonic and electronic materials at the wafer scale — combining the maturity of silicon manufacturing with the active-device performance of compound semiconductors. The result is a photonic engine that is fast, efficient, and producible at the volumes AI demands.

P / Material co-integration

Heterogeneous from the wafer up.

Compound semiconductors for active light generation and thin-film lithium niobate for high-speed modulation, monolithically co-integrated with a silicon photonics platform — at wafer scale, not at the package.

E / Energy per bit

Architected at the device level.

Sub-pJ/bit targets are designed in from the device physics upward, not optimized for at the link layer downward.

M / Manufacturing path

Foundry-compatible from day one.

Process-compatible with commercial photonic foundries — no exotic equipment, no captive line, a credible path to volume.

Si SUBSTRATE SiO₂ BOX → PHOTON PROPAGATION → III–V LASER III–V MESA · QW GAIN bonded to Si · wafer scale TFLN MODULATOR G · S · G TRAVELING-WAVE ELECTRODE x-cut TFLN ridge waveguide · Pockels effect Ge PHOTODIODE Ge ON Si selective-area epi · 1310 / 1550 nm
Fig. 01 · Heterogeneous photonic stack — cross-section not to scale · schematic

Thin-film lithium niobate, on a silicon photonics base.

High-speed modulation is the bottleneck between an AI accelerator and the light that carries its data. AiTexel builds modulators in thin-film lithium niobate — the only mature electro-optic material with the bandwidth headroom, drive-voltage efficiency, and signal linearity required to scale past the silicon-modulator ceiling.

LN / Bandwidth

Headroom past the silicon ceiling.

The Pockels effect in lithium niobate operates linearly into the hundreds of GHz — well past where silicon's plasma-dispersion modulators saturate. The same device physics scales lane rates from today's 200 Gbaud class toward the 400 Gbaud class without re-architecting.

LN / Drive

Sub-volt, driver-amplifier-free.

Direct drive at CMOS-compatible voltages removes the linear amplifier — the dominant power line item at high baud rates. The result is fewer pJ per bit, less heat next to the accelerator, lower co-packaged-optics cooling burden.

LN / Integration

Built on silicon, not beside it.

Thin-film lithium niobate is bonded and processed as part of the silicon photonics flow — not assembled in package. Modulators, lasers, waveguides, and detectors live on one substrate, manufacturable through a single foundry path.

Si SUBSTRATE SiO₂ BOX x-cut TFLN · ~600 nm arm separation G S G E ← → E PUSH-PULL λ = 1550 nm λ = 1550 nm UPPER ARM LOWER ARM
Fig. 02 · TFLN Mach-Zehnder unit cell — cross-section linear Pockels χ⁽²⁾ · zero chirp · >100 GHz

Built by the people who built the platform.

AiTexel is founded by leaders with first-hand experience shipping advanced semiconductor nodes at industrial scale and pioneering hybrid-material device integration.

Aaron Thean

Co-founder

Two decades shipping semiconductor device physics into volume production. Vice President of Logic Technologies at imec, leading an international R&D consortium with Intel, Samsung, TSMC, GlobalFoundries, and Apple — covering FinFET, nanowire-FET, III–V/Ge channel, and beyond-CMOS device architectures. Earlier at IBM (2007–2009), led the team that delivered the industry's first foundry-compatible 32 / 28 nm high-k metal-gate low-power CMOS — the technology inside many of Apple's and Samsung's most successful mobile SoCs. Prior R&D leadership at Qualcomm and Motorola. 50+ U.S. patents.

Relevance Few people in the world have actually run an industrial program that monolithically co-integrated III–V compound semiconductors with silicon at scaled nodes. That's the exact integration physics underpinning AiTexel's stack.

Benjamin Tee

Co-founder

Serial deep-tech founder with prior exit experience; Y Combinator alumnus. A decade-plus building at the intersection of materials, devices, and packaging — bonding dissimilar materials, managing thermal and mechanical stress in multi-material structures, and engineering reliable optoelectronic devices on non-standard substrates. Foundational patents in heterogeneous material bonding and hybrid optoelectronic integration.

Relevance Co-packaged optics on AI accelerators face a brutal mechanical and thermal environment — hot ASICs, package-level stress, mixed-material interfaces. The bonding chemistry, thermal-mechanical reliability, and hybrid-device know-how Benjamin has built map directly onto the packaging and integration challenges of putting TFLN modulators and III–V lasers next to a high-power accelerator die.

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